1. Field
Example embodiments relate to a package substrate and/or a semiconductor package including the same. More particularly, example embodiments relate to a package substrate on which a semiconductor chip is mounted via conductive bumps, and/or a semiconductor package including the package substrate.
2. Description of the Related Art
Generally, a plurality of semiconductor fabrication processes may be performed on a semiconductor substrate to form a plurality of semiconductor chips. In order to mount the semiconductor chips on a printed circuit board (PCB), a packaging process may be performed on the semiconductor chips to form semiconductor packages.
The semiconductor package may include a package substrate, a semiconductor chip arranged over the package substrate, and signal bumps interposed between the semiconductor chip and the package substrate. The signal bumps may electrically connect bonding pads of the semiconductor chip with signal pads of the package substrate. A passivation layer having openings configured to expose the bonding pads may be formed on a lower surface of the semiconductor chip. Thus, the passivation layer may have a lower surface, lower than that of the bonding pads.
In order to reinforce a bonding strength between the package substrate and the semiconductor chip, dummy bumps may be interposed between the package substrate and the semiconductor chip. The dummy bumps may be interposed between the passivation layer of the semiconductor chip and dummy pads of the package substrate. The dummy bumps may have a thickness substantially the same as that of the signal bumps.
Because the lower surface of the passivation layer on the semiconductor chip may protrude downwardly from the lower surface of the bonding pad and the thickness of the dummy bump formed on the passivation layer may be substantially the same as that of the signal bump formed on the bonding pad, the signal bump may not make contact with the signal pad, although the dummy bump may make contact with the dummy pad. As a result, although the dummy bump may reinforce the bonding strength between the semiconductor chip and the package substrate, the semiconductor package may frequently have electrical disconnections.